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CLOTHO v0.1

{fast, correct}
SystemVerilog, choose two.

The fast, correct, open SystemVerilog engine. Run your existing designs and testbenches unmodified, with the language features real verification depends on — and get them back dramatically sooner.
No compromises.

$ clotho run cpu.sv tb.sv

Get started

SUPPORTS

  • Classes & interfaces
  • SVA
  • CRV
  • Full UVMCOMING SOON

84.7%*

(and rising) of the entire 2023 LRM, meaning your existing UVM testbenches run unmodified.

* measured on sv-tests

HOW CLOTHO WORKS

Your RTL, compiled on the fly.

The fastest RTL simulators compile your design to efficient C++ and then machine code. Clotho goes further: it JITs your design on the fly, keeping the performance of compiled code at a fraction of the startup time.

Clotho uses LLVM to skip the C++ altogether, enabling better optimization and reducing compile time dramatically. Combined with build caching, re-runs and quick fixes start up in milliseconds.

Clotho uses full event-driven semantics: stratified event scheduling, accurate time modeling, four-state (0, 1, X, Z) logic. No compromises.

THE TOOLBOX

Big toolbox, one command.

No long TCL scripts, no generated C++ to manage, no wrappers. Point Clotho at your code and it elaborates, compiles, and runs. Edit and re-run in milliseconds.

hello.sv
module hello;
  initial begin
    $display("Hello, world!");
    #10 $display("t = %0t", $time);
    $finish;
  end
endmodule
shell
$ clotho run hello.sv
Hello, world!
t = 10

$ clotho run hello.sv --wave hello.fst
Hello, world!
t = 10
wrote hello.fst

HOW IS IT SO FAST?

Designed from the ground up, performance first.

Clotho’s speed comes from careful design, inspired by Verilator and the fastest software compilers and JITs — V8, Julia, and Clang.

02 Native code JIT

Running real machine code is fundamentally faster than walking a design step by step in an interpreter — the difference shows up on every run, and it compounds over a day of iteration.

03 Four-state logic, done efficiently

Clotho models four state logic very efficiently, and opportunistically drops down to two-state logic where it doesn't matter — without sacrificing behavioral correctness.

04 Smart event scheduling

Inspired by Verilator, Clotho reorders and combines a simulation's work to cut scheduling overhead while producing identical results.

05 Compiler cache

Clotho caches the machine code it generates, so re-running an unchanged design — or one with only small edits — skips the build and starts up in milliseconds.

{FAST, CORRECT} — CHOOSE TWO

Speed never comes at the cost of correctness.

Clotho was designed carefully to follow IEEE 1800-2023, and its behavior is rigorously tested against established simulators. It doesn't cover the entire language yet, but coverage is growing quickly and it's able to run many real cores.

  • Correct four state (0, 1, x, z) logic modeling
  • Fully event-driven, stratified queue scheduler
  • Behavior verified against sv-tests suite
  • Strong LRM (IEEE 1800-2023) coverage
  • UVM readyCOMING SOON

Try it on your own design.

Clotho is open source — no license fees, no per-seat limits. Clone it, point it at your RTL, and turn the hours you lose waiting on simulation into more iterations per day.

We benchmark Clotho comprehensively across real designs — the full results are here. We're confident it will save you time, and encourage you to try it on your own suite.

github.com/coderkalyan/clotho